Conventionally, there is disclosed an SRAM (Static Random Access Memory) in which each memory cell is composed of four MOS transistors.
The SRAM is a semiconductor memory device that basically does not require a refreshing operation, but maintains a data retention state by leakage currents flowing through each memory cell. If the leakage currents in the data retention state are reduced, it is possible to realize lower power consumption, but it becomes important to control the leakage currents flowing through each memory cell to maintain the data retention state.